The present invention relates to a probe card, semiconductor test equipment, and a semiconductor device fabrication method.
FIG. 21 shows an example of the flow of the semiconductor test process, which is one of semiconductor device fabrication processes performed after forming semiconductor device on a wafer. In the figure, packaging LSIs bear chips, and CSPs (Chip Scale Package) are shown as examples of semiconductor devices as a shipping form.
Three main tests are made in the semiconductor device fabrication process as shown in FIG. 21. First, with semiconductor device circuits and electrodes formed on a wafer, a wafer test is made to check test the semiconductor device by open-short test and functional test. Next, a burn-in is made by testing semiconductor devices in a high-temperature or on high-voltage to find unstable semiconductor devices. Finally, a screening test is made to check the product performance before semiconductor devices are shipped.
Equipment used for testing semiconductor devices (semiconductor test equipment) in the prior art is disclosed in JP-A-64-71141 (hereinafter called patent document 1). This prior art equipment uses a spring probe having pins (moving pins) at both ends. That is, an electrical connection is made for testing by bringing the moving pins at one end of the spring probe into contact with the electrodes of a test object (for example, semiconductor device on a wafer) and by bringing the moving pins at the other end brought into contact with the terminals on the substrate in the measuring circuit side.
Another prior art is disclosed in JP-A-8-50146 (hereinafter called patent document 2). In this prior art, a test is made by making an electrical connection for testing by bringing contact terminals into contact with the electrodes of a test object, wherein each contact terminal is formed by using a tip as the cast that is formed by silicon anisotropic etching.